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Zapping

New method accelerates CNF-MIM development

Our innovative “zapping” method drastically reduces development time and costs, enabling us to advance CNF-MIM technology faster and making Smoltek Semi’s technology even more attractive to potential buyers. Read on to see how this new process strengthens our position and shortens our path to market.

While seek­ing buy­ers for our CNF-MIM tech­nol­o­gy, we con­tin­ue to refine our offer­ings. Recent­ly, we’ve made sig­nif­i­cant progress by tripling the capac­i­tance den­si­ty of our CNF-MIM capac­i­tors while halv­ing the leak­age cur­rent with a new dielec­tric stack.

To put this in per­spec­tive for non-experts, increased capac­i­tance den­si­ty means a greater abil­i­ty to store ener­gy in the form of elec­tric charge with­in the same vol­ume. Sim­i­lar­ly, reduced leak­age cur­rent means that the loss of stored ener­gy is reduced, mak­ing our capac­i­tors more efficient.

Such advance­ments boost the appeal of our tech­nol­o­gy to poten­tial buy­ers. How­ev­er, break­throughs require exten­sive exper­i­men­ta­tion. To min­i­mize time-to-mar­ket, we need rapid exper­i­ment set­up capa­bil­i­ties. Man­u­fac­tur­ing full CNF-MIM capac­i­tors is time-con­sum­ing and cost­ly. For quick­er turn­around, we use par­al­lel plate capac­i­tors – sim­pler and cheap­er to pro­duce. Now, Smoltek Semi researchers have fur­ther accel­er­at­ed and econ­o­mized this process.

Parallel plate capacitors as proxies

A par­al­lel plate capac­i­tor is the sim­plest form of capac­i­tor: two met­al plates sep­a­rat­ed by an insu­la­tor. CNF-MIM capac­i­tors share this basic struc­ture, but add car­bon nanofibers to increase the met­al sur­face area many times over. Both types con­sist of par­al­lel met­al sur­faces sep­a­rat­ed by a dielec­tric stack of uni­form thickness.

We man­u­fac­ture par­al­lel plate capac­i­tors using the same meth­ods and mate­ri­als as CNF-MIM capac­i­tors, includ­ing cre­at­ing them on a sil­i­con wafer sub­strate. The only dif­fer­ence is that we omit the car­bon nanofiber steps for par­al­lel plate capac­i­tors. This sim­i­lar­i­ty in pro­duc­tion meth­ods, minus the nanofibers, makes par­al­lel plate capac­i­tors excel­lent sub­sti­tutes for test­ing CNF-MIM tech­nol­o­gy, as they mim­ic CNF-MIM capac­i­tors while being sim­pler and quick­er to produce.

Simplifying electrode access

Con­nect­ing a capac­i­tor requires access to both met­al plates, each of which is called an elec­trode in this con­text. The top elec­trode is eas­i­ly acces­si­ble, but the bot­tom elec­trode pos­es chal­lenges. It’s cov­ered by the top elec­trode and the dielec­tric stack, and can’t be accessed from below due to the substrate.

Pre­vi­ous­ly, cre­at­ing an elec­tri­cal con­nec­tion to the bot­tom elec­trode required sev­er­al com­plex steps. Now, Smoltek Semi researchers use a method we call ”zap­ping” that sig­nif­i­cant­ly sim­pli­fies this process. While not a nov­el tech­nique in itself, it’s new for us to apply it in this con­text. The zap­ping method involves apply­ing a brief, high volt­age across spe­cif­ic con­tact points on a test capac­i­tor, cre­at­ing a con­trolled break­down in the insu­lat­ing lay­er. This tech­nique elim­i­nates the need for mul­ti­ple com­plex etch­ing steps, sig­nif­i­cant­ly stream­lin­ing the test­ing process.

For those unfa­mil­iar with elec­tri­cal engi­neer­ing, imag­ine try­ing to con­nect a wire to the bot­tom of a stack of sand­wich­es with­out dis­turb­ing the top lay­ers. The old method was like care­ful­ly cut­ting through each lay­er to reach the bot­tom. The new zap­ping method is more like using a focused beam of ener­gy to instant­ly melt a tiny, pre­cise hole through the lay­ers. This approach is much faster and caus­es min­i­mal dis­rup­tion to the over­all struc­ture, as it affects only a very small, con­trolled area.

It’s worth not­ing that zap­ping is a devel­op­ment tool that sim­pli­fies CNF-MIM capac­i­tor char­ac­ter­i­za­tion. It’s not intend­ed for actu­al capac­i­tor production.

Why zapping matters

Zap­ping reduces sev­er­al fab­ri­ca­tion steps for test capac­i­tors, short­en­ing iter­a­tion time from a month to a week. This accel­er­a­tion allows more fre­quent test­ing of new con­fig­u­ra­tions, speed­ing up research and opti­miza­tion. It enables rapid eval­u­a­tion of mate­ri­als and design para­me­ters, focus­ing efforts on crit­i­cal com­po­nents like the dielec­tric stack with­out lengthy pro­duc­tion cycles.

Business impact

Zap­ping enhances Smoltek’s posi­tion by mak­ing devel­op­ment more cost-effi­cient and rapid. It reduces R&D expens­es, allow­ing more exper­i­ments and tech­nol­o­gy refine­ment with­out over­spend­ing. This accel­er­at­ed pace enables quick­er deliv­ery of pre­lim­i­nary results to poten­tial part­ners, main­tain­ing their engage­ment and interest.

In nego­ti­a­tions, demon­strat­ing high-per­form­ing, cost-effec­tive tech­nol­o­gy devel­op­ment makes Smoltek a more attrac­tive part­ner. While zap­ping isn’t used in final pro­duc­tion, the abil­i­ty to iter­ate quick­ly ensures a reli­able, scal­able end prod­uct – key con­sid­er­a­tions for poten­tial cus­tomers seek­ing eas­i­ly inte­grat­ed solutions.

Investor perspective

For share­hold­ers, zap­ping trans­lates into a clear advan­tage: faster devel­op­ment cycles mean a short­er time-to-mar­ket for break­throughs, such as tripling the capac­i­tance den­si­ty and halv­ing the leak­age cur­rent, mak­ing CNF-MIM capac­i­tors even more attrac­tive to buyers.

Accelerating smart development

Zap­ping sig­nif­i­cant­ly reduces devel­op­ment time and costs, enabling faster iter­a­tion and main­tain­ing our com­mer­cial­iza­tion tra­jec­to­ry. It’s a prag­mat­ic approach that bol­sters our mar­ket posi­tion and enhances our appeal to poten­tial buyers.

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